Tạp chí

  1. Trong-Thuc Hoang, Ckristian Duran, Khai-Duy Nguyen, Tuan-Kiet Dang, Quynh Nguyen Quang Nhu, Phuc Hong Than, Xuan-Tu Tran, Duc-Hung Le, Akira Tsukamoto, Kuniyasu Suzaki, and Cong-Kha Pham, “Low-power High-performance 32-bit RISC-V Microcontroller on 65-nm Silicon-On-Thin-BOX (SOTB)”, IEICE Electronics Express, Vol. 17, No. 20, pp. 1-6, Oct. 2020.
  2. Trong-Thuc Hoang, Ckristian Duran, Duc-Thinh Nguyen-Hoang, Duc-Hung Le, Akira Tsukamoto, Kuniyasu Suzaki, Cong-Kha Pham, “Quick Boot of Trusted Execution Environment with Hardware Accelerators”, IEEE Access, Vol. 8, Iss. 1, pp. 74015-74023, 2020.
  3. Trong-Thuc Hoang, Xuan-Thuan Nguyen, Duc-Hung Le, Cong-Kha Pham, “Low-power Floating-point Adaptive-CORDIC-based FFT Twiddle Factor on 65-nm Silicon-On-Thin-BOX (SOTB) with Back-gate Bias”, IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), Vol. 66, Iss. 10, pp. 1723-1727, Oct. 2019.
  4. Duc-Hung Le, Trong-Thuc Hoang, Cong-Kha Pham, “A 1.05-V 62-MHz with 0.12-nW standby power SOTB-65nm chip of 32-point DCT based on adaptive CORDIC”, IEICE Electronics Express, Vol. 16, No. 10, pp. 1-6, 2019.
  5. Trần Thị Thu Trang, Diệp Phước Lộc, Phan Vũ Huỳnh Tuấn, Nguyễn Tiến Lộc, Lê Trung Khanh, Huỳnh Quốc Hưng, Lê Đức Hùng, “Hệ thống test chip tự động”, Science and Technology Development Journal – Natural Science, Vietnam National University – Ho Chi Minh City, Vol. 03, No. 03, pp. 235-243, Sep. 2019 – ISSN: 2588-106X.
  6. Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, “Minimum adder-delay architecture of 8/16/32-point DCT based on fixed-rotation adaptive CORDIC”, IEICE Electronics Express, Vol. 15, No. 10, pp. 1-12, 2018 – ISSN 1349-2543.
  7. Trong-Thuc Hoang, Hong-Kiet Su, Hieu-Binh Nguyen, Duc-Hung Le, Huu-Thuan Huynh, Trong-Tu Bui, Cong-Kha Pham, “Design of Co-Processor for Real-Time HMM-Based Text-to-Speech on Hardware System Applied to Vietnamese”, IEICE Electronics Express, Vol. 12 , No. 14, pp. 1-11, 2015 – ISSN 1349-2543.
  8. Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, Duc-Hung Le, and Cong-Kha Pham, “Low-Resource Low-Latency Hybrid Adaptive CORDIC With Floating-Point Precision”, IEICE Electronics Express, Vol. 12 , No. 9, pp. 1-12 , 2015. ISSN 1349-2543.
  9. Le Duc Hung, Nguyen Dang Nhat Tam, Bui Trong Tu, “Parameter Extraction for EKV 2.6 MOSFET Model Based on Genetic Algorithm”, Journal of Science and Technology, Vietnam Academy of Science and Technology, Vol. 52 (6C), pp. 46-56, 2014.
  10. Binh-Son Le, Trong-Tu Bui, Duc-Hung Le, “A Design of 10-bit 100-MS/s Pipelined Folding ADC with Distributed Track-and-Hold Preprocessing”, Science and Technology Development Journal, Vietnam National University – Ho Chi Minh City, Vol.17, No. T1-2014, pp. 39-51, Jan. 2014, ISSN: 1859-0128.
  11. Thanh-Tri Vo, Trong-Tu Bui, Duc-Hung Le, Cong-Kha Pham, “A 6-bit Low-Power High-Speed Flash ADC Using 180nm CMOS Process”, Science and Technology Development Journal, Vietnam National University – Ho Chi Minh City, Vol.17, No. T1-2014, pp. 52-61, Jan. 2014, ISSN: 1859-0128.
  12. Le Trung Khanh, Bui Trong Tu, Le Duc Hung, Pham Cong Kha, “A Design of Low Voltage OPAMP Using Split-length Transistors”, Science and Technology Development Journal, Vietnam National University – Ho Chi Minh City, Vol.17, No. T1-2014, pp. 62-69, Jan. 2014, ISSN: 1859-0128.
  13. Duc-Hung LE, Tran-Bao-Thuong CAO, Katsumi INOUE, Cong-Kha PHAM, “A CAM-based Information Detection Hardware System for Fast Image Matching on FPGA”, IEICE Transactions on Electronics, Vol. E97-C, No.1, pp. 65-76, Jan. 2014 – ISSN (Elec.): 1745-1353, ISSN (Print): 0916-8524.
  14. Xuan-Thuan Nguyen, Trong-Tu Bui, Huu-Thuan Huynh, Cong-Kha Pham, Duc-Hung Le, “An ASIC implementation of 16-bit fixed-point Digital Signal Processor”, Journal of Science and Technology (Special Issue), Vietnam Academy of Science and Technology, Vol. 51 (4B), pp. 282-289, Oct. 2013.

Hội nghị

  1. Hứa Nguyên Khang, Thái Hồng Hải, Mã Khải Minh, Nguyễn Thanh Lộc, Lê Thành Nghị, Lê Đức Hùng, “Thực hiện hệ thống thực thi bảo mật Keystone Enclave trên lõi RISC-V”, Hội thảo Quốc gia lần thứ XXIII về Điện Tử, Truyền Thông và Công Nghệ Thông Tin (REV-ECIT 2020), pp. 75-80, Hà nội, Vietnam, 19 December 2020.
  2. Trần Ngọc Châu, Thái Hồng Hải, Lê Châu Bảo Ngọc, Mã Khải Minh, Đậu Minh Đức, Lê Đức Hùng, “Xây dựng chương trình thiết kế vi mạch số P&R tự động công suất thấp”, Hội thảo Quốc gia lần thứ XXIII về Điện Tử, Truyền Thông và Công Nghệ Thông Tin (REV-ECIT 2020), pp. 157-162, Hà nội, Vietnam, 19 December 2020.
  3. Nguyễn Hoài Nhi, Lê Đức Hùng, “Thiết Kế Hệ Thống Nhận Diện Cử Chỉ Tay Trên Ảnh Nhiệt Sử Dụng Mô Hình VGG16 và SVM”, Hội thảo Quốc gia lần thứ XXII về Điện Tử, Truyền Thông và Công Nghệ Thông Tin (REV-ECIT 2019), pp. 43-47, Hà nội, Vietnam, 07 December 2019.
  4. Lê Hà Nguyên, Lê Đức Hùng, “Hệ thống phát hiện và nhận diện mặt người sử dụng mô hình SqueezeNet và SSD”, Hội thảo Quốc gia lần thứ XXII về Điện Tử, Truyền Thông và Công Nghệ Thông Tin (REV-ECIT 2019), pp. 138-143, Hà nội, Vietnam, 07 December 2019.
  5. Takahiro Hosaka, Trong-Thuc Hoang, Van-Phuc Hoang, Duc-Hung Le, Katsumi Inoue, Cong-Kha Pham, “Live Demonstration: Real-Time Auto-Exposure Histogram Equalization Video-System Using Frequent Items Counter”, IEEE International Symposium on Circuits and Systems (ISCAS 2019), Hokkaido – Japan, pp. 1-1, 26-29 May, 2019 – E-ISSN: 2158-1525.
  6. Ngoc-Tu Bui, Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, “A 0.75-V 32-MHz 181-uW SOTB-65nm Floating-point Twiddle Factor Using Adaptive CORDIC”, The 20th IEEE International Conference on Industrial Technology (IEEE-ICIT 2019), Melbourne – Australia, pp. 835-840, Feb. 13-15, 2019.
  7. Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, “VLSI Design of Floating-point Twiddle Factor Using Adaptive CORDIC on Various Iteration Limitations” (Invited Paper), The 12th IEEE International Symposium on Embedded Multi-core/Many-core Systems-on-Chip (MCSoC-2018), Hanoi – Vietnam, pp. 225-232, Sep. 12-14, 2018.
  8. Phuc-Vinh Nguyen, Thi-Thu-Trang Tran, Phuoc-Loc Diep, Duc-Hung Le, “A Low-power ASIC Implementation of Multi-core OpenSPARC T1 Processor on 90nm CMOS Process”, The 12th IEEE International Symposium on Embedded Multi-core/Many-core Systems-on-Chip (MCSoC-2018), Hanoi – Vietnam, pp. 95-100, Sep. 12-14, 2018.
  9. Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, “High-Speed 8/16/32-Point DCT Architecture Using Fixed-Rotation Adaptive CORDIC”, IEEE International Symposium on Circuits and Systems (ISCAS 2018), Florence – Italy, pp. 1-5, May 27-30, 2018 – E-ISSN: 2379-447X.
  10. Trong-Thuc Hoang, Xuan-Thuan Nguyen, Hong-Thu Nguyen, Nhu-Quynh Truong, Duc-Hung Le, Katsumi Inoue, Cong-Kha Pham, “FPGA-Based Frequent Items Counting Using Matrix of Equality Comparators”, The 60th IEEE International Midwest Symposium on Circuits & Systems (MWSCAS 2017), Boston – USA, pp. 285-288, August 6-9, 2017.
  11. Phuong-Thao Vo-Thi, Trong-Thuc Hoang, Cong-Kha Pham, Duc-Hung Le, “A Floating-point FFT Twiddle Factor Implementation Based on Adaptive Angle Recoding CORDIC”, 2017 International Conference on Recent Advances on  Signal Processing, Telecommunications & Computing (SigTelCom 2017), Danang – Vietnam, pp. 1-4, Jan. 9-11 2017.
  12. Trương Thị Như Quỳnh, Hoàng Trọng Thức, Lê Đức Hùng, “Thiết Kế FFT 2048-Điểm Trên FPGA Dựa Trên CORDIC Xoay Góc Thích Nghi Với Độ Chính Xác Dấu Chấm Động Đơn”, Proc. of the 10th Scientific Conference, University of Science of Ho Chi Minh City, pp. 654, November, 2016.
  13. Võ Thị Phương Thảo, Hoàng Trọng Thức, Trương Thị Như Quỳnh, Lê Đức Hùng, “Hiện Thực Bộ Nhân Số Phức Dấu Chấm Động Cho Tính Toán FFT Dựa Trên Thuật Toán CORDIC Xoay Góc Thích Nghi”, Proc. of the 10th Scientific Conference, University of Science of Ho Chi Minh City, pp. 655, November, 2016.
  14. Lê Trọng Nghĩa, Trần Kim Vũ, Lê Đức Hùng, Bùi Trọng Tú, “Thiết Kế VLSI Bộ Khuếch Đại Nhiễu Thấp Dải Tần 400 – 416 MHz”, Proc. of the 10th Scientific Conference, University of Science of Ho Chi Minh City, pp. 665, November, 2016.
  15. Trong-Thuc Hoang, Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham, Duc-Hung Le, “High-performance DCT Architecture Based on Angle Recoding CORDIC and Scale-free Factor”, The 6th IEEE International Conference on Communications and Electronics (IEEE ICCE 2016), Ha Long – Vietnam, pp. 199-204, Jul. 27-29, 2016.
  16. Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, Duc-Hung Le, and Cong-Kha Pham, “A Low-Power Hybrid Adaptive CORDIC in 65-nm SOTB CMOS Process”, IEEE International Symposium on Circuits and Systems (ISCAS 2016), Montreal – Canada, pp. 2158-2161, May 22-25, 2016.
  17. Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham, Trong-Thuc Hoang, Duc-Hung Le, “A Parallel Pipeline CORDIC based on Adaptive Angle Selection”,  The 15th International Conference on Electronics, Information, and Communication (IEEE ICEIC 2016), Da Nang – Vietnam, pp. 1-4, Jan. 27-30, 2016.
  18. Duc-Hung Le, Nobuyuki Sugii, Shiro Kamohara, Hong-Thu Nguyen, Koichiro Ishibashi, Cong-Kha Pham, “A 400mV 0.59mW Low-power CAM-based Pattern Matching System on 65nm SOTB Process”, IEEE TENCON 2015, Macau, pp. 1-2, Nov. 01-04, 2015.
  19. Hong-Thu Nguyen, Xuan-Thuan Nguyen, Cong-Kha Pham, Trong-Thuc Hoang, Duc-Hung Le, “A Low-resource Low-latency Hybrid Adaptive CORDIC in 180-nm CMOS Technology”, IEEE TENCON 2015, Macau, pp. 1-4, Nov. 01-04, 2015.
  20. Tuan Nguyen-Viet, Duc-Hung Le, “TCAM-based Flow Lookup Design on FPGA and Its Applications”, The 2015 International Conference on Advanced Technologies for Communications (ATC 2015), Ho Chi Minh City – Vietnam, pp. 378-382, Oct. 14-16, 2015.
  21. Duc-Hung Le, Nobuyuki Sugii, Shiro Kamohara, Xuan-Thuan Nguyen, Koichiro Ishibashi, Cong-Kha Pham, “Design of a Low-power Fixed-point 16-bit Digital Signal Processor Using 65nm SOTB Process”, IEEE International Conference on IC Design and Technology (ICICDT 2015), Leuven – Belgium, pp. 1-4, June 01-03, 2015.
  22. Binh-Son Le, Duc-Hung Le, Trong-Tu Bui, “A Successive-Approximation-Register ADC Architecture for Digital Background Calibration in High Speed ADCs”, The IEEE Int. Conf. on Advanced Technologies for Communications (ATC 2014), Hanoi, Vietnam, pp. 42-47, Oct. 15-17, 2014.
  23. Xuan-Vy Luu, Trong-Thuc Hoang, Trong-Tu Bui, and Anh-Vu Dinh-Duc, “A High-speed Unsigned 32-bit Multiplier Based on Booth-encoder and Wallace-tree Modifications”, The  IEEE Int. Conf. on Advanced Technologies for Communications (ATC 2014), Hanoi, Vietnam, pp. –, Oct. 2014.
  24. Duc-Hung Le, Katsumi Inoue, Cong-Kha Pham, “Design of a Parallel CAM-based Multi-Match Search System Using 0.18-µm CMOS Process”, The 5th IEEE Int. Conf. on Communications and Electronics (ICCE 2014), Danang, Vietnam, pp. 336-339 , 30 Jul. -1 Aug., 2014.
  25. Trong-Thuc Hoang, Quang-Trung Tran, and Trong-Tu Bui, “A Proposed Adaptive Image Segmentation Method Based on Local Excitatory Global Inhibitory Region Growing”, The 5th IEEE Int. Conf. on Communications and Electronics (ICCE 2014), Danang, Vietnam, pp. 458-463, July 2014. ISBN: 978-1-4799-5049-2.
  26. Lê Đức Hùng, Võ Thanh Trí, Nguyễn Trần Sơn, Nguyễn Đăng Nhật Tâm, Bùi Trọng Tú, “Phần mềm VIPEX rút trích và tối ưu hóa tham số linh kiện MOSFET tự động”, Hội Thảo quốc gia 2014 về Điện Tử, Truyền Thông và Công Nghệ Thông Tin (REV-ECIT 2014), pp. 397-401, Nha Trang, Vietnam, 9/2014.
  27. Đàm Quang Linh, Hoàng Trọng, Thức, Bùi Trọng Tú, and Đinh Đức Anh Vũ, “Hiện Thực và So Sánh các Thiết Kế FFT 2048 Điểm trên FPGA,” Hội Thảo Quốc Gia 2014 về Điện Tử, Truyền Thông, và Công Nghệ Thông Tin (REV-ECIT 2014), pp. 260-265, Nha Trang, Vietnam, 9/2014.
  28. Thanh-Tri Vo, Duc-Hung Le, Cong-Kha Pham and Trong-Tu Bui, “Power Reduction Methodologies for High-speed Flash ADC Using 180nm CMOS Process”, The 2013 IEICE International Conference on Integrated Circuits, Design, and Verification (ICDV 2013), pp. 46-51, Ho Chi Minh City, Vietnam, Nov. 15-16, 2013.
  29. Trung-Khanh Le, Duc-Hung Le, Cong-Kha Pham and Trong-Tu Bui, “A Design of Differential Digital-Controlled Oscillator in a 0.18um CMOS Process”, The 2013 IEICE International Conference on Integrated Circuits, Design, and Verification (ICDV 2013), pp. 57-60, Ho Chi Minh City, Vietnam, Nov. 15-16, 2013.
  30. Kim-Hung Nguyen, Trong-Thuc Hoang, and Trong-Tu Bui, “An FSM-based IP Protection Technique using Added Watermarked States,” IEEE Int. Conf. on Advanced Technologies for Communications (ATC 2013), Ho Chi Minh City, Vietnam, pp. 718-723, Oct. 2013. ISBN: 978-1-4799-1086-1
  31. Thai-Bao Huynh, Trong-Thuc Hoang, and Trong-Tu Bui, “A Constraint-based Watermarking Technique Using Schmitt Trigger Insertion at Logic Synthesis Level,” IEEE Int. Conf. on Advanced Technologies for Communications (ATC 2013), Ho Chi Minh City, Vietnam, pp. 115-120, Oct. 2013. ISBN: 978-1-4799-1086-1.
  32. Xuan-Thuan Nguyen, Trong-Tu Bui, Huu-Thuan Huynh, Cong-Kha Pham, Duc-Hung Le, “An ASIC implementation of 16-bit fixed-point Digital Signal Processor”, International Conference on Advanced Computing and Applications (ACOMP 2013), pp. 282-289, Ho Chi Minh City, Vietnam, Oct. 23-25, 2013.
  33. Trong-Thuc Hoang, Vi-Thuy Tran, Thanh Le, Minh-Triet Luu, Cao-Quyen Tran, Xuan-Thuan Nguyen, and Trong-Tu Bui, “A Case study of Connect6 Game FPGA-based Implementation Using the Multi-turn Prediction Algorithm,” IEEE Int. Symposium on Signal Processing and Information Technology (ISSPIT 2013), Hochiminh, Vietnam, Dec. 2012. ISBN: 978-1-4673-5604-6.
  34. Trong-Thuc Hoang, Ngoc-Hung Nguyen, Xuan-Thuan Nguyen, and Trong-Tu Bui, “A Real-time Image Feature Extraction Using Pulse-Coupled Neural Network,” International Journal of Emerging Trends and Technology in Computer Science (IJETTCS 2012), Vol. 1, Issue 3, pp. 177-185, Oct. 2012. ISSN: 2278-6856, IF: 2.524.
  35. Trung-Khanh Le, Trong-Tu Bui, Duc-Hung Le and Cong-Kha Pham, “A Design of 16-bit Pi-Type DAC Employing Three-Stage Indirect Feedback Compensation OPAMP”, The International Conference on Integrated Circuits and Devices in Vietnam (ICDV 2012), Da Nang City, Vietnam, Aug. 13-15, 2012.
  36. Binh Son Le, Trong Tu Bui, Duc-Hung Le, “A Design of 10-b 100-MS/s Pipelined Folding ADC with Distributed Track-and-Hold Pre-processing”, The Solid-State Systems Symposium & VLSI and Related Technology (4S-2012), pp. 83-88, Ho Chi Minh City, Aug. 2012.
  37. Trung Khanh Le, Trong Tu Bui, Duc-Hung Le, “A Design of Three-Stage CMOS OPAMP Using Indirect Feedback Compensation Technique”, The Solid-State Systems Symposium & VLSI and Related Technology (4S-2012), pp. 153-156, Ho Chi Minh City, Aug. 2012.
  38. Trong-Thuc Hoang, Ngoc-Hung Nguyen, Xuan-Thuan Nguyen, and Trong-Tu Bui, “A Real-time Object-recognition System Based on PCNN Algorithm,” The 3rd IEICE Int. Conf. on Integrated Circuits and Devices in Vietnam (ICDV 2012), Danang, Vietnam, Aug. 2012. ISBN: 978-4-88552-264-2.